The present application relates generally to an improved data processing apparatus and method and more specifically to load-through fault mechanism.
Flash memory and other evolving forms of persistent memory introduce a new tier in the storage hierarchy. This tier is significantly lower latency of access than magnetic spinning disk, but still significantly longer latency than dynamic random-access memory (DRAM). For this reason, flash memory is not currently deployed with a “load-store” byte addressable model and, instead, is managed with disk-like block input/output (I/O). Flash memory being managed this way translates into requiring traditional disk-like access and programming methods which results in extensive central processing unit (CPU) pathlength and additional latency when managing flash.